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Abstract Preview

Defines the address-space maps, the bus transaction sets, and the node's CSRs. Includes the format and content of the configuration ROM on the node providing the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. The annexes provide background for understanding the usage of this CSR Archtecture specification.


General information

  • Status :  Published
    Publication date : 1994-12
  • Edition : 1
    Number of pages : 135
  • Technical Committee
    :
    ISO/IEC JTC 1/SC 25
    Interconnection of information technology equipment
  • ICS :
    35.160
    Microprocessor systems

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Life cycle

A standard is reviewed every 5 years



Revisions / Corrigenda

  • Now confirmed
    ISO/IEC 13213:1994

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